Digital verification Engineer (BB-F7702)

Found in: Neuvoo IL

תאריך עדכון

19/01/2021

תיאור המשרה

BSc. in Electronic Engineering MSc. an advantage

At least 3 years’ experience as verification engineer. Completing full development cycle an advantage.

Knowledge in verification methodologies, tools (simulators, coverage tools, etc.), and techniques

Knowledge of Verilog, System Verilog or Specman

Experience in Python / Perl programming

Good knowledge of UNIX environment

Developing UVM based verification environments an advantage.

Ability to achieve results in a fast moving, agile flow and dynamic environment, both locally and across the organization

Ability to troubleshoot and analyze complex problems

Self-motivated and self-directed, proactive

Advantage

Experience emulation, Formal

4 days ago

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