Key Qualifications 3+ years experience in SOC power simulation and modeling, hardware power simulation and analysis flow. Familiarity with Verilog and System Verilog. Familiarity with Design Verification flows Familiarity with SOC design flow and methodology. Familiarity with power simulation and power optimization. Strong interpersonal skills are a pre-requisite as you will collaborate with a lot of diverse groups Familiarity with script writing in Python, Perl or Tcl is a plus. Familiarity the multimedia data processing is a plus Familiarity with ASIC power analysis and optimization is a plus. Silicon power measurement experience is a plus.
In this role you will be responsible for SOC power simulation and power verification, SOC use case power analysis, and drive the future SOC power optimization.
Education & Experience
BS.c in EE/ MS.c in EE or Computer Science / Electrical Engineering required.